LPCVD technology is used for uniform, double side deposition of 100 and 150mm size silicon wafers with dielectric or poly-silicon layers at moderate to high process temperatures. Processing is done in three Centrotherm furnaces with 4 tubes each. All applied standard processes are SPC monitored. The layer thickness is measured on test wafers after each run.
- LTO (low Temperature oxide), 100 up to 1200nm
- TEOS, 100 up to 1200nm, larger thickness possible by multiple depositions and intermediate annael steps
- Silicon Nitride (storchiometric), 50 up to 200nm, 1.1GPa tensile stress
- Silicon-rich-Nitride (low stress nitride), 50 up to 800nm, 50 to 150 MPa tensile stress
- Poly-Silicon undoped, 50 up to 3000nm
- Poly-Silicon in-situ boron doped, 50 up to 3000nm, resistivity >0.015 Ohm cm